Formal’s Roadmap

Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with Raik Brinkmann, president and CEO of OneSpin Solutions; Harry Foster, chief verification scientist at Mentor Graphics; Pete Hardee, product management director at Cadence; Manish Pandey, chief architect for new technologies at Synopsys; Anupam Bakshi, CEO of Agnisys; and Vigyan Singhal, president and CEO at Oski Technology. What follows are excerpts of that conversation. Part one can be found here.  Part two is here. SE: When Mentor started the verification surveys, SystemVerilog and UVM were going great guns even though 80% of the industry was still doing directed tests. We do tend concentrate on the…

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